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2.7 v, 800 a, 80 mhz rail - to - rail i/o amplifiers data sheet ad8031 / ad8032 rev. f document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog d evices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2013 analog devices, inc. all rights reserved. technical support www.analog.com features low p ower supply c urrent 800 a/ a mplifier fully s peci fied at +2.7 v, +5 v , and 5 v s upplies high speed and fast s ettling on 5 v 80 mhz , ?3 db b andwidth (g = +1) 30 v/ s s lew r ate 125 ns s ettling t ime to 0.1% rail - to - rail input and o utput no p hase r eversal with i nput 0.5 v beyond s upplies input cmvr extends b eyond r ails by 200 mv output swing to w ithin 20 mv of e ither r ail low d istortion ?62 db @ 1 mhz, v o = 2 v p -p ?86 db @ 100 khz, v o = 4.6 v p -p output c urrent: 15 ma high g rade o ption : v os (max i mum ) = 1.5 mv applications high s peed , b attery - operated s ystems high c omponent density s ystems portable t est i nstruments a/d b uffer s active f ilters high speed , set - and - de mand a mplifier s general description the ad8031 (s ingle) and ad8032 (dual) single -supply, voltage f eedback amplifiers feature high speed performance with 80 mhz of small signal bandwidth, 30 v/ s slew rate , and 125 ns s ettling time. this performance is possible while consuming less than 4.0 mw of power from a single 5 v supply. these features increase the operation time of high speed , battery - powered systems without compromising dynamic performance. the products have tru e single - supply capability with rail - to - rail input and output characteristics and are specified for +2.7 v, +5 v, and 5 v supplies. the input voltage range can extend to 500 mv beyond each rail. the output voltage swings to within 20 mv of each rail provi ding the maximum output dynamic range. the ad8031 / ad8032 also offer excellent signal quality for only 800 a of supply cur rent per amplifier; thd is ?62 dbc with a 2 v p - p, 1 mhz output signal, and C 86 dbc for a 100 khz, 4.6 v p- p signal on +5 v supply. the low distortion and fast settling time make them ideal as buffers to si ngle - supply adcs. connection diagrams nc 1 ?in 2 +in 3 ?v s 4 nc 8 +v s 7 out 6 nc 5 nc = no co nn ect ad 8031 + ? 01056-001 out1 1 ?in1 2 +in1 3 ?v s 4 +v s 8 out2 7 ?in2 6 +in2 5 ad 8032 + ? + ? 01056-002 figure 1 . 8 - lead p dip (n) and soic _n (r) figure 2. 8 - lead p dip (n), soic _n (r) , and msop (rm) v out 1 +in 3 ?v s 2 +v s 5 ?in 4 ad 8031 + ? 01056-003 figure 3. 5 - lead sot - 23 (r j- 5) operating on supplies from +2.7 v to +12 v and dual sup plies up to 6 v, the ad8031 / ad8032 are ideal for a wide range of applications, from battery - operated systems with large bandwidth req uirements to high speed systems where component density requires lower power dissipation. the ad8031 / ad8032 are available in 8 - lead pd ip and 8- lead soic_n packages and operate over the industrial temperature range of ?40c to +85c. the ad8031a is also available in the space -saving 5- lead sot - 23 package , and the ad8032a is available in an 8- lead msop package. 2s/div 1v/div v in = 4. 85 v p-p 01056-004 1v/div 2s/div v out = 4. 65 v p-p g = +1 01056-005 figure 4 . input v in figure 5 . output v out v in +5v 1k? 1.7pf +2.5v v out + ? 01056-006 figure 6 . rail -to- rail performance at 100 khz
important links for the ad8031_8032 * last content update 08/22/2013 06:11 pm documentation an-649: using the analog devices active filter design tool an-581: biasing and decoupling op amps in single supply applications an-356: users guide to applying and measuring operational amplifier specifications an-402: replacing output clamping op amps with input clamping amps an-417: fast rail-to-rail operational amplifiers ease design constraints in low voltage high speed systems cn-0277: high-precision, 18-bit, 5 msps, low power data acquisition signal-chain cn-0201: complete 5 v, single-supply, 8-channel multiplexed data acquisition system with pgia for industrial signal levels cn-0307 a 16-bit, 6 msps sar adc system with low power input drivers and reference optimized for multiplexed applications cn-0255: a complete single-supply, 16-bit, 100 ksps pulsar adc system dissipates 8 mw mt-060: choosing between voltage feedback and current feedback op amps mt-059: compensating for the effects of input capacitance on vfb and cfb op amps used in current-to-voltage converters mt-058: effects of feedback capacitance on vfb and cfb op amps mt-056: high speed voltage feedback op amps mt-053: op amp distortion: hd, thd, thd + n, imd, sfdr, mtpr mt-052: op amp noise figure: dont be mislead mt-050: op amp total output noise calculations for second-order system a stress-free method for choosing high-speed op amps view the ad8031 product page for more documentation for the ad8031 an-358: noise and operational amplifier circuits an-257: careful design tames high speed op amps an-253: find op amp noise with spreadsheet cn0247: 12-bit ,1 msps sar adc and driver with total power dissipation less than 5 mw cn-0105: single-ended-to-differential high speed drive circuit for 16-bit, 10 msps ad7626 adc cn-0080: high speed, precision, differential ac-coupled drive circuit for 16-bit, 6 msps ad7625 pulsar adc ug-127: universal evaluation board for high speed op amps in sot-23-5/sot-23-6 packages ug-101: evaluation board user guide for the ad8032 an-357: operational integrators ug-129: evaluation board user guide ug-128: universal evaluation board for dual high speed op amps in soic packages parametric selection tables find similar products by operating parameters high speed amplifiers selection table design tools, models, drivers & software dbm/dbu/dbv calculator analog filter wizard 2.0 power dissipation vs die temp adisimopamp? opamp stability ad8031a spice macro-model adi/smr ad8032a spice macro-model adi/sm evaluation kits & symbols & footprints view the evaluation boards and kits page for the ad8031 view the evaluation boards and kits page for the ad8032 symbols and footprints for the ad8031 symbols and footprints for the ad8032 design support submit your support request here: linear and data converters embedded processing and dsp telephone our customer interaction centers toll free: americas: 1-800-262-5643 europe: 00800-266-822-82 china: 4006-100-006 india: 1800-419-0108 russia: 8-800-555-45-90 quality and reliability lead(pb)-free data sample & buy ad8031 ad8032 view price & packaging request evaluation board request samples check inventory & purchase find local distributors * this page was dynamically generated by analog devices, inc. and inserted into this data sheet. note: dynamic changes to the content on this page (labeled 'important links') does not constitute a change to the revision number of the product data sheet. this content may be frequently modified. powered by tcpdf (www.tcpdf.org)
ad8031/ad8032 data sheet rev. f | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 connection diagrams ...................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 +2.7 v supply ................................................................................ 3 +5 v supply ................................................................................... 4 5 v supply ................................................................................... 5 absolute maximum ratings ............................................................ 6 maximum power dissipation ..................................................... 6 esd caution .................................................................................. 6 typical performance characteristics ............................................. 7 theory of operation ...................................................................... 13 input stage operation ................................................................ 13 overdriving the input stage ...................................................... 13 output stage, open - loop gain and distortion vs. clearance from power supply ..................................................................... 14 output overdrive recovery ...................................................... 14 driving capacitive loads .......................................................... 15 applications ..................................................................................... 16 a 2 mhz single - supply, biquad band - pass filter ................. 16 high performance, single - supply line driver ........................... 16 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 20 revision history 8/13 rev. e to rev. f changed input current noise at f = 100 khz from 2.4 pa/hz to 0.4 pa/hz (throughout) .......................................................... 3 6/13 rev. d to rev. e changes to dc performance parameter, table 1 ......................... 3 updated outline dimensions ....................................................... 19 changes to ordering guide .......................................................... 20 11/0 8 rev. c to rev. d change to table 3 column heading .............................................. 5 change to ordering guide ............................................................ 20 7 /06 rev. b to rev. c updated format .................................................................. univer sal updated outline dimensions ....................................................... 18 change to ordering guide ............................................................ 20 9/99 re v. a to rev. b
data sheet ad8031/ad8032 rev. f | page 3 of 20 specifications + 2.7 v supply @ t a = 25c, v s = 2.7 v, r l = 1 k to 1.35 v, r f = 2.5 k, unless otherwise noted. table 1. ad8031 a/ ad8032 a ad8031 b/ ad8032 b parameter conditions min typ max min typ max unit dynamic performance C 3 db small signal bandwidth g = +1, v o < 0.4 v p -p 54 80 54 80 mhz slew rate g = ? 1, v o = 2 v s tep 25 30 25 30 v/ s sett ling time to 0.1% g = ?1, v o = 2 v s tep, c l = 10 pf 125 125 ns distortion/noise performance total harmonic distortion f c = 1 mhz, v o = 2 v p - p, g = +2 ? 62 ?62 dbc f c = 100 khz, v o = 2 v p - p, g = +2 ? 86 ?86 dbc input voltage noise f = 1 khz 15 15 nv/hz input current noise f = 100 khz 0 .4 0 .4 pa/hz f = 1 khz 5 5 pa/hz crosstalk ( ad8032 only) f = 5 mhz ? 60 ?60 db dc performance input offset vo ltage v cm = v cc /2; v out = 1 . 35 v 1 6 0.5 1.5 mv t min to t max 6 10 1.6 2.5 mv offset drift v cm = v cc /2; v out = 1 . 35 v 10 10 v / c input bias current v cm = v cc /2; v out = 1 . 35 v 0.45 2 0.45 2 a t min to t max 2.2 2.2 a input offs et current 50 500 50 500 na open - loop gain v cm = v cc /2; v out = 0.35 v to 2.35 v 76 80 76 80 db t min to t max 74 74 db input characteristics common - mode input resistance 40 40 m differential input resistance 280 280 k input capacitance 1.6 1.6 pf input voltage range ?0.5 to + 3.2 ?0.5 to + 3.2 v input common - mode voltage range ?0.2 to + 2.9 ?0.2 to +2 .9 v common - mode rejection ratio v cm = 0 v to 2.7 v 46 64 46 64 db v cm = 0 v to 1.55 v 58 74 58 74 db differential input voltag e 3.4 3.4 v output characteristics output voltage swing low r l = 10 k 0.05 0.02 0.05 0.02 v output voltage swing high 2.6 2.68 2.6 2.68 v output vol tage swing low r l = 1 k 0.1 5 0.08 0.1 5 0.08 v output voltage swing high 2.55 2.6 2.55 2.6 v output current 15 15 ma short circuit current sourcing 21 21 ma sinking ?34 ?34 ma capacitive load drive g = +2 (see figure 46 ) 15 15 pf power supply operating range 2.7 12 2.7 12 v quiescent current per amplifier 750 1250 750 1250 a power supply rejection ratio v s ? = 0 v to ?1 v or v s + = +2.7 v to +3.7 v 75 86 75 86 db
ad8031/ad8032 data sheet rev. f | page 4 of 20 + 5 v supply @ t a = 25c, v s = 5 v, r l = 1 k to 2.5 v, r f = 2.5 k ?, unless otherwise noted . table 2 . ad8031 a/ad8032 a ad8031 b/ ad8032 b parameter conditions min typ max min typ max unit dynamic performance ?3 db small signal bandwidth g = +1, v o < 0.4 v p -p 54 80 54 80 mhz slew rate g = ?1, v o = 2 v s tep 27 32 27 32 v/ s settling time to 0.1% g = ?1, v o = 2 v s tep, c l = 10 pf 125 125 ns distortion/noise performance total harmonic distortion f c = 1 mhz, v o = 2 v p - p, g = +2 ?62 ?62 dbc f c = 100 khz, v o = 2 v p - p, g = +2 ?86 ?86 dbc input voltage noise f = 1 khz 15 15 nv/ hz input current noise f = 100 khz 0 .4 0 .4 pa/h z f = 1 khz 5 5 pa/ hz differential gain r l = 1 k 0.17 0.17 % differe ntial phase r l = 1 k 0.11 0.11 degrees crosstalk ( ad8032 only) f = 5 mhz ?60 ?60 db dc performance input offset voltage v cm = v cc /2; v out = 2.5 v 1 6 0.5 1.5 mv t min t o t max 6 10 1.6 2.5 mv offset drift v cm = v cc /2; v out = 2.5 v 5 5 v/c input bias current v cm = v cc /2; v out = 2.5 v 0.45 1.2 0.45 1.2 a t min to t max 2.0 2 .0 a input offset current 50 350 50 250 na open - loop gain v cm = v cc /2; v o ut = 1.5 v to 3.5 v 76 82 76 82 db t min to t max 74 74 db input characteristics common - mode input resistance 40 40 m differential input resistance 280 280 k input capacitance 1.6 1.6 pf input voltage range ?0.5 to + 5.5 ?0.5 to + 5.5 v input common - mode voltage range ?0.2 to +5 .2 ?0.2 to + 5.2 v common - mode rejection ratio v cm = 0 v to 5 v 56 70 56 70 db v cm = 0 v to 3.8 v 66 80 66 80 db differential input voltage 3.4 3.4 v output characteristics output voltage swing low r l = 10 k 0.05 0.02 0.05 0.02 v output voltage swing high 4.95 4.98 4.95 4.98 v output voltage swing low r l = 1 k 0.2 0.1 0.2 0.1 v output voltage swing high 4.8 4.9 4.8 4.9 v output current 15 15 ma short circuit current sourcing 28 28 ma sinking ?46 ?46 ma capacitive load drive g = +2 (see figure 46 ) 15 15 pf power supply operating range 2.7 12 2.7 12 v quiescent current per amplifier 800 1400 800 1400 a power supply rejection ratio v s ? = 0 v to ?1 v or v s + = +5 v to +6 v 75 86 75 86 db
data sheet ad8031/ad8032 rev. f | page 5 of 20 5 v supply @ t a = 25 c, v s = 5 v, r l = 1 k ? t o 0 v, r f = 2.5 k ?, unless otherwise noted . table 3 . ad8031 a/ad8032 a ad8031 b/ ad8032 b parameter conditions min typ max min typ max unit dynamic performance ? 3 db small signal bandwidth g = +1, v o < 0.4 v p -p 54 80 54 80 mhz slew rate g = ?1, v o = 2 v s tep 30 35 30 35 v/ s settling time to 0.1% g = ?1, v o = 2 v s tep, c l = 10 pf 125 125 ns distortion/noise p erformance total harmonic distortion f c = 1 mhz, v o = 2 v p - p, g = +2 ? 62 ? 62 dbc f c = 100 khz, v o = 2 v p - p, g = +2 ? 86 ?86 dbc input voltage noise f = 1 khz 15 15 nv/hz input current noise f = 100 khz 0 .4 0 .4 pa/hz f = 1 khz 5 5 pa/hz differential gain r l = 1 k 0.15 0.15 % differential pha se r l = 1 k 0.15 0.15 degrees crosstalk ( ad8032 only) f = 5 mhz ? 60 ? 60 db dc performance input offset voltage v cm = 0 v; v out = 0 v 1 6 0.5 1.5 mv t min to t max 6 10 1.6 2.5 mv offset drift v cm = 0 v; v out = 0 v 5 5 v/ c input bias current v cm = 0 v; v out = 0 v 0.45 1.2 0.45 1.2 a t min to t max 2.0 2.0 a input offset current 50 350 50 250 na open - loop gain v cm = 0 v; v out = 2 v 76 80 76 80 db t min to t max 74 74 db input characteristics common - mode input resistance 40 40 m differential input resistance 280 280 k input capacitance 1.6 1.6 pf input voltage range ?5.5 to +5.5 ?5.5 to +5.5 v input common - mode voltage range ?5.2 to +5.2 ?5.2 to +5.2 v common - mode rejection ratio v cm = ? 5 v to +5 v 60 80 60 80 db v cm = ? 5 v to +3.5 v 66 90 66 90 db differential/input voltage 3.4 3.4 v output characteristics output voltage swing low r l = 10 k ? 4.94 ? 4.98 ? 4.94 ? 4.98 v output voltage swing high +4.94 +4.98 +4.94 + 4.98 v output voltage swing low r l = 1 k ? 4.7 ?4.85 ? 4.7 ? 4.85 v output voltage swing high +4.7 +4.75 +4.7 +4.75 v output current 15 15 ma short circuit current sourcing 35 35 ma sinking ? 50 ? 50 ma capacitive load drive g = +2 (s ee figure 46 ) 15 15 pf power supply operating range 1.35 6 1.35 6 v quiescent current per amplifier 900 1600 900 1600 a power supply rejection ratio v s ? = ?5 v to ?6 v or v s + = +5 v to +6 v 76 86 76 86 db
ad8031/ad8032 data sheet rev. f | page 6 of 20 absolute maximum rat ings table 4 . param e ter rating supply voltage 12.6 v internal power dissipation 1 8- lead p dip (n) 1.3 w 8- lead soic_n (r) 0.8 w 8- lead msop (rm) 0.6 w 5 - lead sot - 23 (r j ) 0.5 w input voltage (common mode) v s 0.5 v differential input voltage 3.4 v output short - circuit duration observe power derating curves storage temperature range (n, r, rm, r j) ? 65c to +125 c lead temperature (soldering 10 sec) 300 c 1 specification is for the device in free air: 8- lead pdip : ja = 90c/w. 8- lead soic _n : ja = 155c/w. 8- lead msop : ja = 200c/w. 5- lead sot - 23: ja = 240c/w. stresses above t hose listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. maximum power dissipation the maximum power that can be safely dissipated by the ad8031 / ad8032 is limited by the associated rise in junction temperature. the maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150 c. exceeding this limit temporarily can cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. excee ding a junction temperature of 175c for an extended period can result in device failure. while the ad8031 / ad8032 are internally short - circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (150c) is not exceeded under all conditions. to ensure proper operation, it is necessary to observe the maximum power derati ng curves shown in figure 7 . 2.0 1.5 0 maximum power dissipation (w) 1.0 0.5 5-lead sot-23 t j = +150c 8-lead pdip 8-lead soic ambient temperature (c) 8-lead msop ?50 ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 01056-007 figure 7 . maximum power dissipation vs. temperature esd caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although this product features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
data sheet ad8031/ad8032 rev. f | page 7 of 20 typical performance characteristics 90 80 0 number of parts in bin 40 30 20 10 60 50 70 n = 250 v os (mv) ?5?4?3?2?1012345 01056-008 figure 8. typical v os distribution @ v s = 5 v 2.5 2.3 1.5 offset voltage (mv) 2.1 1.9 1.7 v s =5v v s =+5v ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 temperature (c) 01056-009 figure 9. input offset voltage vs. temperature ?30 1.00 0.65 0.50 0.95 0.70 0.60 0.55 0.85 0.75 0.90 0.80 v s =5v input bias (a) temperature (c) ?40 ?20?100 102030405060708090 01056-010 figure 10. input bias current vs. temperature common-mode voltage (v) 800 ?800 input bias current (na) 600 400 200 0 ?200 ?400 ?600 012345678910 v s =10v v s =5v v s =2.7v 01056-011 figure 11. input bias current vs. common-mode voltage offset voltage (mv) common-mode voltage (v) 0 ?0.3 ?0.6 ?0.1 ?0.2 ?0.4 ?0.5 v s =5v 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 01056-012 figure 12. v os vs. common-mode voltage 1000 750 600 950 800 700 650 900 850 supply current/amplifier (a) ?40 ?30 ?20 ?10 0 10 20 30 40 50 60 70 80 90 temperature (c) i s ,v s =5v +i s ,v s =+5v +i s ,v s = +2.7v 01056-013 figure 13. supply current vs. temperature
ad8031/ad8032 data sheet rev. f | page 8 of 20 0 ?0.5 ?2.5 ?1.0 ?1.5 ?2.0 v cc =2.7v v cc =5v v cc = 10v difference from v cc (v) 100 1k 10k r load ( ? ) v cc v ee v in v cc 2 r load v out 01056-014 figure 14. +output saturation voltage vs. r load @ +85c 0 ?0.5 ?2.5 ?1.0 ?1.5 ?2.0 difference from v cc (v) 100 1k 10k r load ( ? ) v cc =2.7v v cc =5v v cc =10v v cc v ee v in v cc 2 r load v out 01056-015 figure 15. +output saturation voltage vs. r load @ +25c 0 ?0.5 ?2.5 ?1.0 ?1.5 ?2.0 difference from v cc (v) 100 1k 10k r load ( ? ) v cc v ee v in v cc 2 r load v out v cc =2.7v v cc =5v v cc = 10v 01056-016 figure 16. +output saturation voltage vs. r load @ ?40c 1.2 1.0 0 100 10k 1k 0.6 0.4 0.2 0.8 r load ( ? ) difference from v ee (v) v cc =10v v cc =5v v cc =2.7v v cc v ee v in v cc 2 r load v out 01056-017 figure 17. ?output saturation voltage vs. r load @ +85c 1.2 1.0 0 100 10k 1k 0.6 0.4 0.2 0.8 r load ( ? ) difference from v ee (v) v cc v ee v in v cc 2 r load v out v cc = 10v v cc =5v v cc =2.7v 01056-018 figure 18. ?output saturation voltage vs. r load @ +25c 1.2 1.0 0 100 10k 1k 0.6 0.4 0.2 0.8 r load ( ? ) difference from v ee (v) v cc v ee v in v cc 2 r load v out v cc =2.7v v cc =5v v cc = 10v 01056-019 figure 19. ?output saturation voltage vs. r load @ ?40c
data sheet ad8031/ad8032 rev. f | page 9 of 20 110 105 60 90 75 70 65 100 95 80 85 gain (db) 0 2k 4k 6k 8k 10k r load (? ) v s = 5v +a ol ?a ol 01056-020 figure 20 . open - loop gain (a ol ) vs. r load 86 84 76 82 80 78 ?40 ?30 ?20 ?1 0 0 10 20 30 40 50 60 70 80 90 tempe ra t ur e (c) gain (db) v s = 5v r l = 1k? ?a ol +a ol 01056-021 figur e 21 . open loop gain vs. (a ol ) temperature 110 80 50 100 90 70 60 a ol (db) v out (v) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v s = 5v r load = 10k? r load = 1k? 01056-022 figure 22 . open - loop gain (a ol ) vs. v out 10 0 ?10 input vo lt age (v) input bias current (ma) 100 90 10 0% v s = 5v 500m v 500m v 1v ?1 .5 0.5 2.5 4.5 6.5 01056-023 figure 23 . differential input overvoltage i - v characteristics 0.05 diff gain (%) ?0 .15 ?0 .05 ?0 .10 0 0.10 diff phase (degrees) ?0 .10 0 ?0 .05 0.05 1st 2nd 3rd 4th 5 th 6th 7t h 8th 9 th 10 th 11 th 1st 2nd 3rd 4th 5th 6th 7th 8 th 9th 10 th 11 th 01056-024 figure 24 . differential gain and phase @ v s = 5 v; r l = 1 k freque nc y (hz) 100 30 0.3 10 3 1 100 10 1 0.1 10 10 0 1k 10k 100 k 1m 10m input voltage noise (nv/ hz) v s = 5v curr ent n oi se vo lt age n oi se input current noise (pa/ hz) 01056-025 figure 25 . input voltage noise vs. frequency
ad8031/ad8032 data sheet rev. f | page 10 of 20 frequency (mhz) normalized gain (db) 5 4 ?5 3 2 1 0 ?1 ?2 ?3 ?4 0.1 1 10 100 v s =5v g=+1 r l =1k ? 01056-026 figure 26. unity gain, ?3 db bandwidth frequency (mhz) normalized gain (db) ?5 3 2 1 0 ?1 ?2 ?3 ?4 v s = 5v v in = ?16dbm 0.1 1 10 100 +85c +25c ?40c v s v in 50? 2k? v out 01056-027 figure 27. closed-loop gain vs. temperature 1m frequency (hz) closed-loop gain (db) ?8 2 1 0 ?1 ?4 ?5 ?6 ?7 ?2 ?3 100k 10m 100m g=+1 c l =5pf r l =1k ? v s =+5v r l +c l to 2.5v v s = +2.7v r l +c l to 1.35v v s =5v 01056-028 figure 28. closed-loop gain vs. supply voltage frequency (mhz) phase (degrees) ?20 30 20 10 0 ?10 40 ?90 ?135 ?180 ?225 phase gain open-loop gain (db) 100 10 1 0.3 01056-029 figure 29. open-loop frequency response 10m fundamental frequency (hz) total harmonic distortion (dbc) ?80 ? 20 ?30 ?40 ?50 ?60 ?70 1k 10k 100k 1m 2v p-p v s =2.7v 1.3v p-p v s =2.7v 4.8v p-p v s =5v 2 g=+1,r l =2k ? to v cc 2.5v p-p v s =2.7v 01056-030 figure 30. total harmonic distortion vs. frequency; g = +1 fundamental frequency (hz) total harmonic distortion (dbc) ?80 ? 20 ?30 ?40 ?50 ?60 ?70 ?90 ?100 1k 10k 100k 1m 10m g=+2 v s =5v r l =1k ? to 2 v cc 1v p-p 4v p-p 4.6v p-p 4.8v p-p 0 1056-031 figure 31. total harmonic distortion vs. frequency; g +2
data sheet ad8031/ad8032 rev. f | page 11 of 20 frequ enc y ( hz) 0 10 8 6 4 2 output (v p-p) 1k 10k 100k 1m 10m v s = 5 v v s = + 5v v s = +2. 7v 01056-032 figure 32 . large signal response freque nc y (mhz) 100 50 10 1 0.1 rb t = 50? rb t = 0 ? r out (?) 0.1 1 10 100 200 rb t v out 01056-033 figure 33 . r out vs. frequency freque nc y (hz) common-mode rejection ratio (db) 0 ?40 ?60 ?80 ?20 ?100 v s = 5v 10 0 1k 10k 100 k 1m 10m 01056-034 figure 34 . cmrr vs. frequency freque nc y (hz) power supply rejection ratio (db) 0 ?40 ?60 ?80 ?100 ?20 ?120 v s = 5v 10 0 1k 10k 100 k 1m 10m 100m 01056-035 figure 35 . psrr vs. frequency 5.5 4.5 3.5 1.5 0.5 ?0 .5 1v/div 2.5 10 s/div v s = 5v r l = 10k ? to 2.5v v in = 6v p-p g = +1 01056-036 figure 36 . output voltage 5.5 4.5 3.5 1.5 0.5 1v/div 2.5 input ?0 .5 v s = 5v g = +1 input = 650m v beyo nd ra ils 10 s/div 01056-037 figure 37 . output voltage phase reversal behavior
ad8031/ad8032 data sheet rev. f | page 12 of 20 500mv/div 10 s/div 0 r l to +2.5v r l t o g nd v s = +5v r l = 1k? g = ?1 01056-038 figure 38 . output swing 50 ns/div 3.1 2.9 2.7 2.3 2.1 1.9 200mv/div 2.5 g = +2 r f = r g = 2. 5k? r l = 2k? c l = 5pf v s = 5v 01056-039 figure 39 . 1 v step response 2.85 2.35 1.85 0.85 0.35 1.35 500mv/div v s = 2.7v r l = 1k? g = ?1 10s/div r l to gnd r l to 1.35v 01056-040 figure 40 . output swing 50 ns/div 2.56 2.54 2.52 2.48 2.46 2.44 2.50 20mv/div g = +1 r f = 0 ? r l = 2k? to 2.5v c l = 5 pf to 2.5v v s = 5v 01056-041 figure 41 . 100 mv step response freque nc y (mhz) 001 1.0 crosstalk (d b) 1 10 ?50 ?60 ?70 ?100 200 ?80 ?90 v s = 2.5v v in = + 10 dbm 0.1 1 10 100 200 1k? 50? v in 2. 5k? 2. 5k? 2. 5k? 50? 2. 5k? t ran smi tter receiver v out 01056-042 figure 42 . crosstalk vs. frequency
data sheet ad8031/ad8032 rev. f | page 13 of 20 theory of operation the ad8031 / ad8032 are single and dual versions of high speed, low power , voltage feedback amplifiers featuring an innovative architecture that maximizes the dynamic range capability on the inputs and outputs. the l inear input common - mode range exceeds either supply voltage by 200 mv, and the amplifiers show no phase reversal up to 500 mv beyond supply. the output swings to within 20 mv of either supply when driving a light load; 300 mv when driving up to 5 ma. fabricated on analog devices , inc. extra fast complementary bipolar (xfcb) process, the amplifier provides an impressive 80 hz bandwidth when used as a follower and a 30 v/ s slew rate at only 800 a supply current. careful design allows the amplifier to operate with a supply voltage as low as 2.7 v. input stage operatio n a simplified schematic of the input stage appears in figure 43. for common - mode voltages up to 1.1 v within the pos itive supply (0 v to 3.9 v on a single 5 v supply) , tail current i2 flows through the pnp differential pair, q13 and q17. q5 is cut off; no bias current is routed to the parallel npn differential pair , q2 and q3. as the common - mode voltage is driven within 1.1 v of the positive supply, q5 turns on and routes the tail current away from the pnp pair and to the npn pair. during this transition region, the input current of the amplifier change s magnitude and direction. reusing the same tail current ensures that the input stage has the same transconductance , which determines the gain and bandwidth of the amplifier, in both regions of operation. switching to the npn pair as the common - mode voltage is driven beyond 1 v within the positive supply allows the amplifi er to provide useful operation for signals at either end of the supply voltage range and eliminates the possibility of phase reversal for input signals up to 500 mv beyond either power supply. offset voltage also change s to reflect the offset of the input pair in control. the transition region is small, approximately 180 mv. these sudden changes in the dc parameters of the input stage can produce glitches that adversely affect distortion. overdriving the inpu t stage sustained input differential voltages gr eater than 3.4 v should be avoided as the input transistors can be damaged. input clamp diodes are recommended if the possibility of this condition exists. the voltages at the collectors of the input pairs are set to 200 mv from the power supply rails. this allows the amplifier to remain in linear operation for input voltages up to 500 mv beyond the supply voltages. driving the input common - mode voltage beyond that point will forward bias the collector junction of the input transistor, resulting in phase re versal. sustaining this condition for any length of time should be avoided because it is easy to exceed the maximum allowed input differential voltage when the amplifier is in phase reversal. q3 q2 q13 q17 q6 q8 q10 4 q14 4 1 1 q7 q15 1 q11 4 1 4 q16 q18 q4 v cc v in v ip q5 q9 v ee output stage, common-mode fee dbac k r4 2k? r2 2k? r1 2k? i3 25 a i4 25 a r3 2k? i1 5a i2 90 a 1.1v r5 50k? r6 850? r7 850? r8 850? r9 850? 01056-043 figure 43 . simplified schematic of ad8031 input stage
ad8031/ad8032 data sheet rev. f | page 14 of 20 output stage, open - loop gain and distortion vs . clearance from pow er supply the ad8031 features a rail - to - rail o utput stage. the output transistors operate as common - emitter amplifiers, providing the output drive current as well as a large portion of the amplifiers open - loop gain. di ff erential dr ive from inpu t stag e q3 7 q47 q21 q20 q51 q27 q68 q44 q42 q48 q49 q50 q43 v out q38 i1 25 a i2 25 a c9 5pf c5 1.5p f i5 25 a i4 25 a r29 300? + + 01056-044 figure 44 . output stage simplified schematic the output vo ltage limit depends on how much current the output transistors are required to source or sink. for applications with low drive requirements ( for instance, a unity gain follower driving another amplifier input), the ad8031 typically swings within 20 mv of either voltage supply. as the required current load increases, the saturation output voltage increase s linearly as i load r c where: i load is the required load current . r c is the output transisto r collector resistance. for the ad8031 , the collector resistances for both output transistors are typically 25 . as the current load exceeds the rated output current of 15 ma, the amount of bas e drive current required to drive the output transistor into saturation reach es its limit, and the amplifiers output swing rapidly decrease s. the open - loop gain of the ad8031 decreases approxim ately linearly with load resistance and depends on the output voltage. open- loop gain stays constant to within 250 mv of the positive power supply, 150 mv of the negative power supply , and then decreases as the output transistors are driven further into sa turation. the distortion performance of the ad8031 / ad8032 amplifiers differs from conventional amplifiers. typically , the distortion p erformance of the amplifier degrades as the output voltage amplitude increases. used as a unity gain follower, the output of the ad8031 / ad8032 exhibit s more distortion in the peak output voltage region around v cc ? 0.7 v. this unusual distortion characteristic is caused by the input stage architecture and is discussed in detail in the input stage operation sec tion, output overdrive rec overy output overdrive of an amplifier occurs when the amplifier attempts to drive the output voltage to a level outside its normal range. after the overdrive condition is removed, the amplifier must recover to normal operation in a reasonable amount of time. as shown in figure 45 , the ad8031/ ad8032 recover within 100 ns from negative overdrive and within 80 ns from positive overdrive. r l 50? v in v out 100 ns 1v v s = 2.5v v in = 2.5v r l = 1k? t o g nd r f = r g = 2k? r g r f 01056-045 figure 45 . overdrive recovery
data sheet ad8031/ad8032 rev. f | page 15 of 20 driving capacitive l oads capacitive loads interact with an op amps output impedance to create an extra delay in the feedback path. this reduces c ircuit stability and can cause unwanted ringing and oscillation. a given value of capacitance causes much less ringing when the amplifier is used with a higher noise gain. the capacitive load drive of the ad8031 / ad8032 can be increased by adding a low valued resistor in series with the capacitive load. introducing a series resistor tends to isolate the capacitive load from the feedback l oop, thereby diminishing its influence. figure 46 shows the effects of a series resistor on the capacitive drive for varying voltage gains. as the closed - loop gain is increased, the larger phase margin allows for larger capacitiv e loads with less overshoot. adding a series resistor at lower closed - loop gains accomplishes the same effect. for large capacitive loads, the frequency response of the amplifier is domin ate d by the roll - off of the series resistor and capacitive load. 1000 10 100 capacitive load (pf) closed-l oo p g ain (v/v) 1 0 1 2 3 4 5 r s = 5 ? r s = 0 ? r s = 20? r s = 20? r s = 0 ? , 5 ? v s = 5v 200m v step with 30% o versh oo t r g r f r s c l v out 01056-046 fi gure 46 . capacitive load drive vs. closed - loop gain
ad8031/ad8032 data sheet rev. f | page 16 of 20 applications a 2 mh z single - supply , biquad band - pass filter figure 47 shows a circuit for a single - supply , biquad band -pass filter with a center freq uency of 2 mhz. a 2.5 v bias level is easily created by connecting the noninverting inputs of all three op amps to a resistor divider consisting of two 1 k resistors connected between 5 v and ground. this bias point is also decoupled to ground with a 0.1 f capacitor. the frequency response of the filter is shown in figure 48. t o maintain an accurate center frequency, it is essential that the op amp have sufficient loop gain at 2 mhz. this requires the choice of an op amp with a significantly higher unity gain , crossover frequency. the unity gain , crossover frequency of the ad8031 / ad8032 is 40 mhz. multiplying the open - loop gain by the feedback factors of the individual op amp circuits yields the loop gain for each gain stage. from the feedback networks of the individual op amp circuits, it can be see n that each op amp has a loop gain of at least 21 db. this lev el is high enough to ensure that the center frequency of the filter is not affected by the op amps bandwidth. if, for example, an op amp with a gain bandwidth product of 10 mhz was chosen in this application, the resulting center frequency would shift by 20% to 1.6 mhz. 5v 0.1f 0.1f 1k? 1k? ad 8031 5v v out c2 50 pf c1 50 pf r6 1k? r4 2k? 1/2 ad 8032 1/2 ad 8032 r5 2k? r1 3k? v in r2 2k? r3 2k? 0.1f 01056-047 figure 47 . a 2 mhz , biquad band - pass filter using ad8031 / ad8032 freque nc y (hz) gain (db) ?50 0 ?10 ?30 ?40 ?20 10k 100k 1m 10m 100m 01056-048 figure 48 . frequency response of 2 mhz band - pass filter high performance , single - supply line driver even though the ad8031 / ad8032 sw ing close to both rails, the ad8031 has optimum distortion performance when the signal has a common - mode level half way between the supplies and when there is about 500 mv of headroom to each rai l. if low d istortion is required in single - supply applications for signals that sw ing close to ground, an emitter - follower circuit can be used at the op amp output. 10 f 5v 7 3 2 2n 3904 200? 6 2. 49k? 49 .9 ? 4 ad 8031 2. 49k? 49 .9 ? 49 .9 ? 0.1f v in v out 01056-049 figure 49 . low distortion line driver for single - supply , ground referenced signals figure 49 shows the ad8031 c onfigured as a single -supply, gain - of - 2 line driver. with the outpu t driving a back - terminated 50 ? line, the overall gai n from v in to v out is unity. in addition to minimizing reflections, the 50 ? back termination resistor protects the transistor from damage if the cable is short circuited. the emitter follower, which is inside the feedback loop, ensures that the output voltage from the ad8031 stays about 700 mv above ground. using this circuit, low distortion is attainable even when the output signal swings to within 50 mv of ground. the circuit was test ed at 500 khz and 2 mhz.
data sheet ad8031/ad8032 rev. f | page 17 of 20 figure 50 and figure 51 show the output signal swing and frequency spectrum at 500 khz. at this frequency, the output signal (at v out ), which h as a peak - to - peak swing of 1.95 v (50 mv to 2 v), has a thd of ?68 db (sfdr = ?77 db). 2v 50mv 10 0% 100 90 0.5v 1s 01056-050 figure 50 . output signal swing of low distortion line driver at 500 khz stop 5mhz vertical scale (10db/div) st ar t 0hz +9dbm 01056-051 figure 51 . thd of low distortion line driver at 500 khz f igure 52 and figure 53 show the output signal swing and frequency spectrum at 2 mhz. as expected, there is some degradation in signal quality at the higher frequency. when the output signal has a peak - to - peak swing of 1.45 v (sw inging from 50 mv to 1.5 v), the thd is ?55 db (sfdr = ?60 db). this circuit could also be used to drive the analog input of a single-supply, high speed adc whose input voltage range is referenced to ground ( for example, 0 v to 2 v or 0 v to 4 v). in this case, a back termination resistor is not necessary (assuming a short physical distance from transistor to adc) ; therefore, the emitter of the external transistor would be connected directly to the adc input. the available output voltage swing of the circu it would therefore be doubled. 50mv 10 0% 100 90 1.5v 0.2v 200 ns 01056-052 figure 52 . output signal swing of low distortion line driver at 2 mhz vertical scale (10db/div) +7dbm st ar t 0hz stop 20 mhz 01056-053 figure 53 . thd of low distortion line driver at 2 mhz
ad8031/ad8032 data sheet rev. f | page 18 of 20 outline dimensions compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 54. 8-lead plastic dual in-line package [pdip] narrow body (n-8) dimensions shown in inches and (millimeters) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 55. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches)
data sheet ad8031/ad8032 rev. f | page 19 of 20 compliant to jedec standards mo-178-aa 10 5 0 seating plane 1.90 bsc 0.95 bsc 0.60 bsc 5 123 4 3.00 2.90 2.80 3.00 2.80 2.60 1.70 1.60 1.50 1.30 1.15 0.90 0 .15 max 0 .05 min 1.45 max 0.95 min 0.20 max 0.08 min 0.50 max 0.35 min 0.55 0.45 0.35 11-01-2010-a figure 56. 5-lead small outline transistor package [sot-23] (rj-5) dimensions shown in millimeters compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b figure 57. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters
ad8031/ad8032 data sheet rev. f | page 20 of 20 ordering g uide model 1 temperature range package description package option brand ing ad8031 anz C 40c to +85c 8- lead p dip n-8 ad8031 ar C 40c to +85c 8- lead soic _n r-8 ad8031 arz C 40c to +85c 8- lead soic _n r-8 ad8031 arz - reel C 40c to + 85c 8- lead soic_n, 13" tape and reel r-8 ad8031 arz - reel7 C 40c to +85c 8- lead soic_n, 7" tape and reel r-8 ad8031 art - r2 C 40c to +85c 5- lead sot - 23 rj -5 h0a ad8031 art - reel7 C 40c to +85c 5- lead sot - 23, 7" tape and reel rj -5 h0a ad8031 artz - r2 C 40c to +85c 5- lead sot - 23 rj -5 h04 ad8031 artz - reel C 40c to +85c 5- lead sot - 23, 13" tape and reel rj -5 h04 ad8031 artz - reel7 C 40c to +85c 5- lead sot - 23, 7" tape and reel rj -5 h04 ad8031 bnz C 40c to +85c 8- lead p dip n-8 ad8031 br C 40c to +8 5c 8- lead soic _n r-8 ad8031 brz C 40c to +85c 8 - lead soic _n r - 8 ad8031 brz - reel C 40c to +85c 8- lead soic_n, 13" tape and reel r-8 ad8031 brz - reel7 C 40c to +85c 8- lead soic_n, 7" tape and reel r-8 ad8031 ar - ebz 8- lead soic evaluation board ad8 031 art - ebz 5- lead sot - 23 evaluation board ad8032 anz C 40c to +85c 8- lead p dip n- 8 ad8032 ar C 40c to +85c 8- lead soic _n r-8 ad8032 ar - reel7 C 40c to +85c 8- lead soic_n, 7" tape and reel r-8 ad8032 arz C 40c to +85c 8- lead soic _n r-8 ad8032 arz - reel C 40c to +85c 8- lead soic_n, 13" tape and reel r-8 ad8032 arz - reel7 C 40c to +85c 8- lead soic_n, 7" tape and reel r-8 ad8032 arm C 40c to +85c 8- lead msop rm -8 h9a ad8032 arm - reel C 40c to +85c 8 - lead msop, 13" tape and reel rm - 8 h9a ad8032 arm - reel7 C 40c to +85c 8- lead msop, 7" tape and reel rm -8 h9a ad8032 armz C 40c to +85c 8- lead msop rm -8 h9a# ad8032 armz - reel C 40c to +85c 8- lead msop, 13" tape and reel rm -8 h9a# ad8032 armz - reel7 C 40c to +85c 8- lead msop, 7" tape and reel rm -8 h9a# ad8032 bnz C 40c to +85c 8- lead p dip n-8 ad8032 br C 40c to +85c 8- lead soic _n r-8 ad8032 br - reel7 C 40c to +85c 8- lead soic_n, 7" tape and reel r-8 ad8032 brz C 40c to +85c 8- lead soic _n r-8 ad8032 brz - reel C 40c to +85c 8- lead soic_n, 13" tape and reel r-8 ad8032 brz - reel7 C 40c to +85c 8- lead soic_n, 7" tape and reel r-8 ad8032 ar - ebz 8- lead soic evaluation board ad8032 arm - ebz 8- lead msop evaluation board 1 z = rohs compliant part, # denotes lead - free product may be top or bottom marked. ? 2013 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d01056 -0- 8 /13(f )

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